Keyed automatic gain control circuit with double time constant input voltage filter



P. F. G.

HOLST KEYED AUTOMATIC GAIN CONTROL 2,533,519 CIRCUT WITH DOUBLE TIMECONSTANT INPUT VOLTAGE FILTER Filed June 23, 1949 l 2 Sheets-Sheet lJan. 16, 1951 P. F. G. HoLsT 2,538,519

KEYED AUTOMATIC GAIN CONTROL CIRCUIT WITH DOUBLE TIME CONSTANT INPUTVOLTAGE FILTER 2 Sheets-Sheet 2 Filed June 25 v/DEo AND Aaa. VOLTAGEPatented Jan. 16, 1.951

KEYED AUTGMATIC GAIN CONTRL CIR- CUT WITH DOUBLE TIME CONSTANT INPUTVOLTAGE FILTER Application .lune 23, 1949, Serial No. 100,795-

6 Claims.

The present invention is a novel automatic gain control (AGC) circuitfor television revceivers.

A number of AGC circuits have been developed, and research in this`iield' has 'been very active. Such research has 'been directed to' the'finding of an eiiicient AGC system with good brightness stability,freedom from flicker normally caused by line voltage uctua'tions, a highdegree of immunity from noise interference, and easy adaptability to usein conventional television receivers, with a minimum loss in gain andband- Width and a minimum cost. 'The present invention is directed tothose objectives.

It is an object of the present invention to provide a fast AGC circuitwhich reduces and substantially eliminates the eliects of 'ast fadingand interference normally caused by passing airplanes.

Another object of .theinvention is to provide an AGC circuit whichmaintains the Video out-f,

put signals at an optimiundlevel for sync signal separation.

A particularly important object `of the. .invention lis to provide anamplified AGC .potentialdeveloping system Vfree vfrom .the limitations.and disadvantages of conventional direct coupled amplifiers. Y Anobject ofv the invention is to Aprovide `a, de tector andfilter systemfor developing an AGC voltage-proportional topeak IF'carr'ier level,combined with a pulse rectifier system controlled lby the.inst-mentioned voltage.` to .plate-.rectify lpositivepulses of linefrequency, Vthereby todeve'l'opa strong amplified .AGC potential.Another related n object is toutilize the pulse-rectifier for `delaypurposes. .Stillanother object under this heading is to utilize aconvenient source for the linefrequency pulses.

An object of the invention isto provide an AGC system of minimumsusceptibility to impulse panying drawings, in which there isillustrated a preferred illustrative form of AGC system in accordancewith the invention, as embodied in a television receiver.

In the drawings Fig. 1 is a circuit schematic, partly in block form,showing a preferred form of my AGC system as Aadaptedfor use with anvotherwise standard television receiver, and Fig. 2

is a set of performance curves employed in describing the operation ofthe invention.

In `accordance with the invention, there Vis provided, in a televisionreceiver which includes video stages to becontrolled (such as l'l andll) the combination of `mean-s including av rectifier coupled tothe laststage' and a double time-constant integration circuit (such as EGE?, HH,H32, Eet, IE5, |66) for'deve'loping an AGC potential proportional' tothe peak amplitude of the video signal, a source of line-frequencypulses of positive polarity (the existing damper Sil and' pulse inverter69 being utilizedvv in this illustrative embodiment for developing suchpulses), and triode rectifier means (lill) controlled by said potentialor develop-ing by plate rectification an amplitude AGC potential. Inaccordance with one feature of the invention .the application of the AGCpotential to the controlled .stages is delayed by a bias impressed onthe cathode circuit of the triode Ypulse rectifier. At the outsetparticular attention is directed to lthose units and elements.

The specific description begins with a brief explanation of a typicalchannel Which is controlled by an automatic gain control device inaccordance with the invention. In the present illustrati-ve disclosure,the novel automatic gain control is shown as incorporated in a type oftelevision receiver known as the Crosley Model 348CP, and furtherdescribed in Crosley rllelevisionv Receiver Information .Service ManualNo. 35S, published in 1948 by the Crosley Division, AVCO ManufacturingCorporation, Cincinnati, Ohio, copyright No. K24953. That receiver isoi" the superheterodyne type, and :it includes the usual antenna,antenna input and oscillator modulator stages (not shown herein), theoscillator modulator being generally designated'by the reference numeral10 (Fig. l). It vvill be understood that lany suitable arrangementsmaybe employed for the antenna, the local oscillator, the frequencyconverter, and theantennainput circuit. A suitable arrangement isspecifically shown and described in the copending patent application ofJohn D. Reid, entitled Television Receiver System, Serial No. 785,303,filed November 12, 194'?" 3 now Patent No. 2,537,995, granted May 16,1950, in the U. S. Patent Once and assigned to the same assignee as thepresent application and invention.

The frequency Vconverting stage is coupled to a first intermediatefrequency amplifying stage ll as by a double-tuned input circuitincluding a transformer i2, the primary of which may be resonated by acapacitor I3, and the secondary of which may be tuned by a capacitor i4.The trap circuits provided for attenuating the video carrier on theadjacent undesired higher channel and the sound carrier on the adjacentundesired lower channel have been omitted herein as not necessary to adescriptionof the present invention. The first intermediate frequencyamplier li also includes an amplifier tube i having an input electrodecircuit coupled to the secondary of transformer l2. The anode or outputcircuit of tube i5 is coupled through a double-tuned circuit includingtransformer i6 to a second intermediate frequency amplifier l?. Theprimary of transformer I6 may be resonated by the output capacity oftube l5 and the distributed circuit capacities, and the secondary may beresonated by the input capacity of tube i8 and the distributed circuitcapacities, the control electrode input circuit of tube i8 being coupledto the secondary of this transformer by a capacitor I9.

The cathodes of tubes l5 and i3 respectively are provided withunby-passed self-biasing resistors 2li and 2l, respectively. The controlelectrode of tube l5 is returned through a resistor 22 yto an AGC line23, and the control electrode of tube I3 is returned through a resistor24 to this AGC line, `the control potentials being nltered by a shuntcapacitor lli and developed by an automatic gain control circuitprovided in accordance with the present invention. The inventionconcerns itself with the means and methodV by which the AGC potentialsare derived and applied to the controlled tubes through line 23. The AGCpotential applied to tube l5 is further filtered by shunt capacitor 25.

In the above-referred-toi Crosley receiver the sound channel, hereinomitted, is coupled to the primary of transformer I6, and there isprovided at the secondary of transformer i6 a circuit arrangement forattenuating the adjacent sound carrier, herein omitted as not pertinentto the present invention.

The video IF signal is applied to the third IF amplifier 29 by acoupling circuit comprising inductor 2l and capacitor 28, this amplineralso including a tube 29. Inductor 2 is resonated by the output capacityof tube I8 and the input capacity of tube 26, and an absorption trapcircuit (not shown) may be provided if desired further to attenuate theseparated sound IF signal.

The output of amplier 26 is coupled to an inductor 33 and a capacitor 3lto a fourth intermediate frequency amplier 32, comprising a tube 33having a grid resistor 34 and a cathode resistor 35 by-passed by acapacitor 36. The last intermediate frequency amplier stage 32 iscoupled as by a transformer 3i to a crystal rectifier de-Z tectornetwork 38. This network is of conventional character and includes aload resistor 39, across which the composite derived video andsynchronizing signals appear, a series peaking inductor 49, a seriespeaking inductcr 4i, and capacitors 42, 43, and 44. Inductor 4iresonates at the IF frequency to filter out the IF signals.

In the foregoing description, and in fact throughout this disclosure,screen grids, wave traps, filters, and other circuit eements which ineed not be shown in order to illustrate or to dis- 4 close or describethe present invention or an ap` propriate background for the inventionare omitted for purposes of simplicity and. clarity, so far aspracticable. 1Bentodes are shown as triodes to avoid unnecessarydiscussion of screen grid circuits.

rIhe composite video signal is fed from the detector 38 into a cathodefollower stage 45 which comprises a tube 46 having an input circuitcoupled to the detector load resistor 39 and also having a cathoderesistor 4l. The cathode resistor 4'! is coupled by a line 48 to thevideo amplier and D. C. restorer stages and ultimately tothe picturetube. It is additionally coupled to a conventional synchronizingseparator device.

indicated by the reference numeral 49, which functions in the usualmanner to separate the synchronizing signals from the video signals andthen to separate the horizontal synchronizing signals from the verticalsynchronizing signals. The separating device 49 has an output circuitcomprising a lead 50 which is connected to the vertical deection system(not shown). It also has an output circuit comprising a groundedterminal 5l and a high potential terminal 52 which develops pulses ofnegativeV polarity applied to an inverter stage 53.

Those above-described elements which begin with the reference numeralsIl and i4 and end with the numeral 48 collectively show the channelwhich is controlled and the significant elements of that channel betweenthe antenna input stage (not shown) and the video ampiiner and picturetube stages (not shown). In short, these elements show that which iscontrolled.

It will be understood thatY the invention is not conned to this specifictype of controlled channel but may be utilized in any televisionreceiver environment wherein AGC is desired.

This novel automatic gain control employs keying, and the descriptionnow proceeds to a discussion of the arrangement by which the keyingpulses are developed.

It will be understood that the sync separator 49 comprises the usualintegrating circuit for separating out the vertical synchronizing pulsesand differentiating circuit for separating out the horizontal pulses ofline frequency. The output of the last-mentioned or differentiatingcircuit is coupled to the input of an inverter stage 53 which comprisesa tube 54 having a grid resistor 55 and a cathode resistor 56. The anodeand cathode of this tube are separately coupled as by capacitors 51 and58 to an anode 59 anda cathode 69 of a double diode AFC detector tube,both diodes of which are arranged in series. Between anode 59 andcathode 60 are connected a pair of resistors 6| and 62, the junctionofwhich is connected to the input of a multivibrator stage 63. r.Thearrangement rof inverter 53 is such that pulses are periodically appliedat line frequency with positive polarity to anode 59 of AFC detectorstage 64 and with negative polarity to cathode 60 of that stage. Inother words, the synchronizing signals from'syncseparator 49, astranslated by inverter 53, are effectively applied with like polarity toboth diodes of stage 64, for the purpose of periodically keying thediodes into conductivity. There are also applied to these diodes withdifferential polarities sawtooth signals developed by integration ofpulses obtained from the plate circuit of damper tube 64. For thispurpose, the plate of damper tube 64 is coupled through a pacitor 61 andgrid resistor 68 to the input circuit of a pulse inverter tube 69, theplate of this tube being coupled through an integrating circuit,comprising resistor l and capacitor 1|, and a coupling capacitor 'l2 tocathode 'I3 and anode l of the AFC detector stage t4. The AFC detectorderives a D. C. output voltage, appearing across resistors 5l and t2,which has a magnitude and polarity functionally related to the relativephases and direction of phase lag or lead of the sawtooth signals,representing the integrated pulses obtained from tube 55, and thesynchronizing pulses translated'to the AFC detector stage rby inverter53. Automatic frequency control systems of this general' character aredisclosed in various publications and patents, including the patent ofKarl R. Wendt entitled Television System, assigned to the RadioCorporation of America, il'. S. Patent No. 2,358,545.

It will be seen that the horizontal deflecting system selected forpurposes oi illustration is of the indirect sync type, the D. C.potential output Vof detector se being filtered by shunt capacitor leand applied to the input of a cathode-coupled multivibrator stage @3.For a description of the details of multivibrator @3, reference is madeto the following patents and publications: U. S. Patent No. 2,481,871,Harland A. Bass, assigned to the AVCO Manufacturing Corporation, issuedFebruary 15, 1949, entitled Relaxation Oscillator CapacitanceMultiplier; U. S. Patent No. 2,157,434, James L. Potter, issued May 9,1939; the article by J. L. Potter, pages 713 et seq., Proceedings of theInstitute of Radio Engineers, June 1938, volume 26, No. 6, published bythe Institute of Radio Engineers at New York, New York.

The multivibrator comprises a pair of tubes 'I5 and it, a common cathoderesistor il, a lter capacitor i3, and RC feedback network 59, 80, acoupling network 3l, 82, a pair of plate load resistors 83, 84, and adischarge capacitor 85. The output of the multivibrator is coupled tothe in- -put circuit of tube S6 of ampliiier stage Si, by a couplingnetwork comprising capacitor 88', series resistor 89, and grid resistor99. Self-bias for the cathode or the output tube is provided by bias 1resistor 9 l by-passed by capacitor 92.

The anode circuit of output tube B6 begins at the anode, then progressessuccessively through the primary 93 oi the output transformer, conductor94, booster capacitor E55, the secondary of the output transformer (thisportion being paralleled by the cathode-anode circuit of damper tube6e), and the horizontal deflecting coils QSA, 96B to a sliding contacton a potentiometer 91, nnally to a source of space current (not shown).

The horizontal output stage is conventional and is coupled bytransformer 93 to the horizontal deflection coils 95A, 99B', the latterbeing shunted by a series combination of damper trio'de 54 and boosterrcapacitor 95. The grid of the triode 64 is capacitively coupled byinherent interelectrode capacitance to the anode of thatV tube and isconnected through a dropping resistor 98 to a' space current source (notshown).

The construction and operation of the circuit elements shown within theblock @il is Well known to the art, the theory'being discussed in thefollowing patents and publications:

Magnetic Deflection Circuits, Otto H. Schade, RCA Review, September,1947, volume VIII, No. 3, pp. 506 et seq.;

U. S. Patent 2,280,733, Toison;

U. S. Patent 2,382,822, Schade;

' U, S, Patent 2,460,540, Shaw.

ascesi@ Those circuit-elements function. in such: way that the followingevents occur: When! tuber- 86 becomes n'onconductiveA at the end of'the-,trace period,y the magnetic iield in` deecting coils 96A, 96Bcollapses and theenergy appears inthe form 0f a charge across theyinherentY circuit capacity ofthe yoke' system. After one half cycle offree oscillation in the resonantcircuit made-up. of the coils QiA,QBB'and the i`nherent-capacity,.the yoke current is built up'ftoamaximum in a direction opposite to the maximum current immediatelybefore-Y retrace, the magnetic eld then having reversed. Tube Bil-thenbecomes conductive and thej next trace begins, the magnetic energy beingdissipated across tubeli` and capacitor being charged to feedv back someof the energy tothe D; C. source". As the reversed current through theyoke approaches the zero axis, tubeS' again becomes' conductivel andtrace continues. The control electrode circuit of tube 64 is coupled tothe anode in such a Way that the tube acts as a negativev resistance,with resultant improvement in linearity ofthe deiiecton current.

The elements beginning' withV the reference numerals 53 and i3" andending with the reference numerals i313 and S9 are-herein show-n forbackground purposes* The stage' 9s is used in the automatic gainvcontrol' systen' of the presentinvention to providea source of negativepulses. These pulses are developed at the' anode of tube Ell during theretrace periods, when both output tube Si; and damper tube Marenoncond-uctive.

Referring now speciiically to theautomatic gain'. control' in accordancewith the present invention, it comprises the following principalcircuits: First, apeak-recti'er' for deriving a controlvoltage, therectier having a fast time-constant load circuit; second, a filtercircuit having a long timev constant, at the' output of which a rectiedvoltage of positive polarity appears; third', a pulse rectiiier' stagecontrolled? by the last-mentioned control voltage'. The control voltageappearing at the pulse-rectier outputis directly proportional to thepeak magnitude of the video intermediate frequency signals. A delaybia-s is impressedL onVA the cathode circuit of the trlode pulsevrectifier tube, This tube is pericdicall'y keyed' i-n-to conductivity bypulses from damper tube 64, amplified and inverted by pulse invertertube 69. The control voltage output of the triod'e pulse rectifier isapplied.l to the control electrodesor tubes l5 .andl' in the rst andsecond IFv amplifier stages, in order to control the gain of the videochannel.

In the AGC circuit in accordance with the invention, the control voltageappears at the output of the controlled triod'e pulse rectiiier, withthe following advantages:

First, control voltages of great amplitude are obtained without thenecessity of operating the output stage 32 of the video IF amplifyingsystern at a higher level than that required for adequate video signals;

Second, the video output is held at a substantially constant levelindependent of variations in the input carrier signal voltage;

Third, the limitations of the usual directcurrent amplier-such asdiiiicult voltage requirements, instability, and susceptibility toanode` Supply voltage changes-have been overcome;

Specifically, a germanium peak rectifier network comprising a rectifierlil, resistor lill, capacitor |62, and resistor H33, is coupled, as byateatro tal line or 60 microseconds.

The rectified voltage appearing across resistor |03 is filtered by meansof a relatively long time-constant circuit, comprising a series resistor|05 and a shunt capacitor |06, which preferably has a time constant of0.05 second or more, 0.066 second being preferred, the resistor |05being connected between the ungrounded terminal of resistor |03 and thegrid of a triode pulse rectifier tube |01, the capacitor |06 beingshuntedV across the input of this tube.

The time` constant of the peak rectifier load network |02, |33 is suchthat Ythe voltage appearing across resistor |03 is a function of thepeak (synchronizing pulse) value of the video IF signal appearing at theplate of tube 33 and is substantially independent of picture content.The fast time constant of this circuit renders the AGC control voltagesubstantially independent of occasional noise pulses. The capacitance ofcapacitor |82 is low, and therefore the energy stored in it byoccasional noise pulses is small. The D. C. component of the noisepulses is therefore small. The peak rectifier time constant may be aslow as one horizontal line or as high as five lines. The shorter timeconstant is preferred, because it decreases the noise susceptibility ofthe system.

The second time-constant circuit-|05, |05 filters out the A. C.component of noise energy, the 60 cycle vertical synchronizing pulsecomponents and the A. C. component resulting from the fast charge andslow discharge of capacitor |32 which occur at line frequency. The timeconstant of this circuit should be at least 0.05 second. A

double time constant integration circuit for improving noise immunity isper se a part of the prior art. However, so far as I am aware, no onehas, before my invention, conceived the use of such a circuit to controlthe rectification of line-frequency pulses, whereby to provide anegative AGC control voltage. It is customary to apply the output of adouble time-constant integration circuit directly to the grids of thecontrolled IF amplifier tubes. p

The voltage output of the double time-constant integration network is ofpositive polarity as applied to the control electrode of pulse rectifiertriode |91.

Horizontal line pulses are applied to tube 01 in the following manner:The plate circuit of damper tube tti is coupled to the grid circuit ofpulse inverter tube SS by series resistors |55 and Gt, couplingcapacitor G1 and grid resistor 68, so that the negative pulses of linefrequency appearing at the anode of damper tube St are amplified by tube@s and appear at the plate circuit of the latter as positive :pulses ofline frequency. These positive pulses of line frequency are applied,through a capacitor |518 intercoupling the plates of tubes SS and lili,to the anode circuit of tube lei, whereby the latter tube isperiodically keyed to conductivity to rectify the pulses applied to itsplate.

The triode pulse rectifier tube un is provided retrace.

with a load resistor |09, between its anode and ground, and loadresistor |09 is coupled to a filter circuit comprising vseries resistorH0 and shunt .capacitor The output of this filter network is connectedto the control electrode of controlled IF amplifiers and I1 by the AGCline 23 and resistors 22 and 24. This filter steadies the pulsatingvoltage output of tube |01.

It will be seen that the detector in the present AGC circuit operates todevelop a positive voltage. This voltage is used to controlrectification of pulses in synchronism with and derived from thehorizontal pulses which control horizontal In this illustrativeembodiment, the circuit comprising damper tube E4 andr pulse invertertube S9 was chosen as a convenient source of pulses to be rectified. Itis within the spirit of the invention, generically, to employ any sourceof line frequency pulses for keying the rectifier tube |01 orequivalent.

Tube |01 is provided with a cathode biasing resistor I2, bypassed by acapacitor l i3, the biasing resistor ||2 being connected, for purposesof deiayed AGC, to the positive terminal of a source of potential (notshown).

The curves of Fig. 2 are referred to in describing the operation of theinvention. When no video IF signal is present, the germanium rectifler|00 does not rectify and the control grid voltage on'pulse rectier tubel'i is zero. The cathode resistor ||2 is so proportioned that anodecurrent is prevented from flowing in tube |01 at the peaks of the pulsesfrom tube 69, when the grid of tube [t1 is at ground potential. Underthis condition plate rectification does not occur in tube ili'l and theAGC control voltage between line 23 and ground is zero, the gain of IFamplifier stages and |'i thenbeing at a maximum.

When video IF signals are present, a positive voltage proportional toythe peak magnitude thereof is applied to the grid of the pulse rectiertube |01, but plate rectification in that tube does not take placeunless the output of the system, including the video IF amplifiers andthe germanium rectier and the double time-constant integration network,is of sufiicient magnitude to permit rectification during the peaks ofthe pulses applied to the plate of tube |91.

rihe cathode bias on the triode AGC amplifier, obtained by a voltagedivider from B, is of such a large value that the tube is biased beyondcutoff at zero video IF signal. The magnitude of this bias beyond cutoffdetermines the delay in the AGC action. The larger the value of thecathode bias, the farther beyond cutoff the triode is biased. Hence agreater magnitude of video IF signal is required to start the AGCaction. The farther beyond cutoif'the triode is biased, the greater isthe AGC delay.

l Pulses from the pulse inverter are applied to the plate ofthe triode.Depending upon the magnitude of the positive rectified voltage appliedto the grid of the triode, anod rectification of the pulses may occur.

No rectification, however, will occur until the Ipositive rectifiedvoltage applied to the triode grid exceeds the delay voltage. From thispoint, the voltage produced by anode rectification is a function of thecontrol grid voltage. As the control grid positive rectied voltageincreases, the voltage produced by anode rectification increases. Sincethe AGC tube is a triode, amplification is obtained. Also, since thepositive rectified ccntrol grid voltage is proportional to peakmagnitude of the video 1F signal and the voltage produced by ,anoderectification is :a function -of the positive ,frectiiied voltage`applied to the control grid of the itriode, the 'voltage produced byanode rectification is a function of Athe peak magnitude of the video IFsignal. The voltage prou duced by anode rectification is smoothed in anR.C. network i l0, H1 with a time constant ci 0.1 second. The `output ofthis integrating net- Work is a .negative voltage suitable for automatic-gain control.

The delay in vapplying AGC control voltage -to stages Il and fIl isfunctionally vrelated to the minimum voltage, which, when applied Itothe grid of tube |01, causes platerectication therein.- The AGCpotential is prevented from lower- -in'g the gain of the lvideo channeluntil the outputof the video detector is sufoiently to insure yfullcontrast. The delay may be changed by a change in the positive voltageapplied to the .cathode of tube i?.

After the video signal and the voltage applied to the grid oi the triodepulse rectifier S07 have .reached a magnitude Ywhich overcomes thedelay, that voltage, so applied to the grid ci tube |03', is amplied,`resulting in the development vof a strong AGC `'voltage which maintainsthe output of the video channel at a lmore oon- -stant level. Y

Curve A of Fig.' 2 lshows the video detector (unit vt8) output vfor the:receiver Without AGC',

l vinput signal in .lmicrovolts being plotted as abscissae against videorvoltage as ordinates in a vfra-mooi Cartesian coordinates. Curve Bshows the Video' 'detector output When AGC according to the invention isemployed. -Curve C shows the Areferred lto above. 1 v y Capacitor l|3212 mmf., 600 v. Capacitor ill: 56 mmf., 500 V.

0.005 mfd., 5,00 v. mmf., Amica 180 mmf., 500 v. 150v mmf., mica 0.001mld., 600 V. 4.7 mmf., 500 v. 10 mmf., 500 v. 10 mmf., 500 v. 0.01 mfd.,600 V.

Capacitor Capacitor i9: Capacitor 28: Capacitor 3|: Capacitor 36:Capacitor 42: Capacitor s3: Capacitor d4: Capacitor 61:

Capacitor |04: 100 mmf. rCapacitor |02: 180 mmf. Capacitor |03: '0.02mfd. Capacitor 0.1 mfd. Capacitor |06: 0.02 mid. Capacitor H3: f1.0 mfd.Capacitor' H: 0.005 infd., 600 V. Capacitor '|22 0.005 mid., 600 v'.Capacitor 5?: 0.001 ifd., 600 V.

0g001 600 v. l0.1 mid., 600'v'. 0.025 mfd., 200 v. 82' mfd., `500 v.Capacitor' 85: 150 mmf., mica Capacitor E02: '0.1 mrd., 600 v. Capacitor9,5: 4 mfd., mica Multivibrator E3: As described in the patent ofHarland- A. Bass, referred .to above.

Capacitor 58: Capacitor 80:' Capacitor 18: Capacitor 8| Y Resistor sResistor 10 Tube 1x5: Type 6AC7 Tube |31: Type 6AC7 rBube Z9: Type 6AC7Tube 33,: Type 6AC7 In detector 38: Type IN34 crystal rectifier Tube G6:Half of 6SN7GT Tube 0,9: Half of 6SN'7GT Tube |01: Half of 6SN7GTRectifier E00: Type IN34 germanium Arectifier Tube 5d: Half of 6SN7GT InAFC detector: BHG Tube i5: Half of 6SN7GT Tube Half of v6SN7GT Tube6BG6G Tube Vld: 6AS7G Transformers and sync separator and deflectionyoke: As specified in Crosley Television Receiver Information ServiceManual No. 353

Resistor 22: 220,000 ohms, 0.5 watt Resistor 20: 220,000 ohms, L0.5ywatt Resistor 20: 47 ohms, 0.5 watt Resistor 2| 47 ohms, 0.5 WattResistor :3s: 470,000 ohms, '0.5 watt Resistor 35: `120 ohms, 0.5 WattResistor 30: 3900 ohms, 0.5 Watt Resistor ril: 1000 ohms, 0.5 WattResistor 05: 150,000-ohms, 0.5 Watt Resistor': 150,000'0hms, 0.5 WattResistor `t8: 18,000 ohms, 0:5 Watt Resistor |0i: 56,000 ohms ResistorH03: 330,000 ohms Resistor |05: 3.3 megohms Resistor 109: 150,000 ohmsResistor |10: 1 megohm Resistor l0: 47,000 ohms, 0.5Watt Resistor 55:100,000 ohms, 0.-5 Watt Resistor 50: 1500 ohms, 0.5 -watt Resistor si:100,000 ohms, 0:5 watt Resistor t2: 100,000 ohms,I 0.5 Watt Resistor l0:82,000 ohms, 0.5 Watt Resistor .83: 47,000 ohms, -1 watt Resistor 813:-1 megohm, 0.5 watt Resistor |14: 100,000 `ohms, 0.5 Watt l1: 1000 ohms,0:5 Watt Resistor s2: 470,000 ohms, 0.5 watt Resistor `80: 100 ohms,0.5-Watt Resistor S0: 1 megohm, 0.5 watt Resistor ai: ohms, 1 wattResistor M5: 455,000 ohms, 1 watt Resistor 03: 297,000 ohms, 0.5 WattResistor M0: 1000 ohms, v0.5 Watt Resistor l H: 1000 ohms, 0.5 WattResistor H8: 1000 ohms, 0.5 Watt Resistor 20: 15,000 ohms, 2 Watts A|21:1000 ohms, 0.5 Watt Vision receiver video channel of the type includinggain-controlled stages comprising means coupled to anintermediate-frequency output circuit of said channel for developing anAGC potential of posit-ive polarity having a magnitude proportional to'the peak amplitude of the received video signal, said means consistingof a rectier element and a 1r-type load network for 1l said rectifierelement, the input shunt arm of said network comprising a rst capacitorand a rst resistor in parallel relation but in series with saidrectifier element, the time const/ant of said first resistor andcapacitor being of the order of 63.5 microseconds or one line period,the series arm of said network comprising a second resistor and theoutput shunt arm of said network comprising a second capacitor, the timeconstant of said second resistor and capacitor being greater than oneframe period and at least 50,000 microseconds, said AGC potential beingthe rectified voltage output appearing across the output shunt arm ofsaid network, a source of line-frequency pulses of positive polarity,pulse inverter means including an electron tube having a controlelectrode coupled to said output shunt arm-and an anode coupled to saidsource,

said tube being controlled by said AGC potential for anode-rectifyingsaid pulses, and means including a filter providing a load for saidanode for utilizing the output pulses of said tube to control the gainof said channel.

2. An automatic gain control circuit for a television receiver videochannel of the type including electron tubes having control elementscomprising means coupled to the intermediate-frequency output of saidchannel and including a peak-rectifier with a cathoderesistance-capacitance load having a fast time constant of the order ofone lineperiod followed by a casvcaded series resistor-shunt capacitorfllter network having a long time constant ofv at least 0.05 second, fordeveloping an AGC potential having a magnitude proportional to the peakamplitude of the received video signal, a source of linefrequency pulsesof positive polarity, electrontube pulse-rectifier means including acontrol electrode coupled to said lter network and an anode coupled tosaid source, said pulse rectiiier means being responsive to andcontrolled by said AGC potential for anode-rectifying said pulses,thereby to invert said pulses, and means including a i-llter network inthe anode circuit of said pulse rectifier means for applying the outputsignals of said pulse rectifier means to the control element of eachautomatic-gain-controlled tube in said channel.

3. An automatic gain control circuit in accord- Y ance with claim 2wherein the first-named means is coupled to said video channel by aseries coupling capacitor and shunt resistor, said resistor beingconnected to the anode of the peak rectiiier.

4. A delayed automatic gain control circuit for a television receivervideo channel comprising means coupled to the intermediate-frequencyoutput of said channel and including a rectifier and a doubletime-constant vr-type rectifier load network for developing an AGCpotential of positive polarity having a magnitude proportional to thepeak amplitude of the received video signal,

. the input shunt arm of said network comprising Vsistor and capacitorbeing greater than one frame period and at least 50,000 microseconds,said AGC potential being the rectified voltage output appearing acrossthe output shunt arm 0f said network, a source of line-frequency pulsesof positive polarity, triode-rectiiier means having a control electrodewhich is coupled to said output shunt arm and a cathode and an anodewhich is coupled to said source, said triode being responsive to andcontrolled by said AGC potential for anode-rectifying said pulses, meansincluding a filter for utilizing the output pulses of said trioderectifier means to control the gain of said channel, and means forimpressing a positive bias on said cathode impedance to delay suchcontrol until the video carrier signal has attained a predeterminedlevel.

5. In a television receiver adapted to receive a television signalhaving predetermined line and frame periods each approximating 63.5microseconds and 33,400 microseconds, an automatic gain control circuitcomprising a video signal detecting rectier element, a vr-type loadnetwork for said rectier element, the input shunt arm of said networkcomprising a first capacitor and a rst resistor in parallel relation,the time-constant product of the values of said first resistor andcapacitor being on the order of one line period or 63.5 microseconds,the series arm of said network comprising a second resistor and theoutput shunt arm of said network comprising a second capacitor, thetimeconstant product of said second resistor and capacitor being greaterthan one frame period and at least 50,000 microseconds, means forapplying an intermediate-frequency carrier wave to s-aid rectifierelement, said carrier wave being amplitude modulated with both pictureand synchronizing intelligence, a pulse source and pulse rectiiier meanshaving an input electrode coupled to the output shunt arm of saidnetwork and an anode coupled to said pulse source, said rectier meansbeing controlled by the rectified voltage developed across said outputshunt arm, and means including a iilter for utilizing the Youtputvoltage of the Ypulse rectifier to control the gain of said televisionreceiver.

6. In a television receiver adapted to receive a television signalYhaving predetermined line and frame periods each approximating 63.5microseconds and 33,400 microseconds, an automatic gain control circuitcomprising a video signal detecting rectifier element, a 1r-type loadnetwork for said rectifier element. the input shunt arm of said networkcomprising a iirst capacitor and a first resistor in parallel relation,the time-constant product of the values of said first resistor andcapacitor being of the order of one line period, the series arm of saidnetwork comprising a second resistor and the output shunt arm of saidnetwork comprising a second capacitor, the time-constant product of saidsecond resistor and capacitor being greater than one frame period, meansfor applying an intermediate-frequency carrier wave to said rectiiierelement, said carrier Vwave being amplitude modulated with both pictureand synchronizing intelligence, a pulse source and pulse rectifier meanscoupled to the output shunt arm of said network and an anode vcoupled tosaid pulse source, said rectifier means being controlled by therectiiied voltage developed across said output shunt arm, and meansincluding a iilter for utilizing the output voltage of the pulserectifier to control the gain of said television receiver.

PAUL F.' G. HoLs'r.

(References on following page) REFERENCES CITED Number The followingreferences are of record in the le of th1s\ patent. i 214983339 UNITEDSTATES PATENTS ,v5 2,520,012 Number Name Date 2,227,056 Blumlein et a1Deo. 31, 1940 2,230,295 Holmes Feb. 4, 1941 Number 2,266,731 Andrieunec. 23, 1941 845897 2,300,942 Lewis Nov. 3, 1942 10 851,899

Nam-e l Date Blumlen et a1- Jan. 5, 1943 Somers June 11, 1946 HaywardFeb. 28, 1950 Montgomery Aug. 22, 1950 FOREIGN PATENTS Country DateFrance Sept. 4, 1939 France Jan. 16, 1940

